NUCLEO-H5E5ZJ — Redrawing the Schematics as a GPIO View As a precursor to my work on STM32H5E5ZJ and the ST NUCLEO-H5E5ZJ development PCB I redrew the NUCLEO-H5E5ZJ schematic as a personal exercise in understanding the architecture of the board and the STM32H5E5. I have consolidated the original multi-sheet design into a main STM32H5E5 schematic and a separate STLINK schematic, using port objects to make the principal interconnections explicit. During the redraw, I cross-checked the connectivity against ST's original Altium design files and the more recent PDF schematics. My aim was to show the MCU GPIO ports rather than their alternate functions, as I found this gave me a different picture of how the MCU is connected to the board. The exercise also revealed just how much functionality is exposed by the NUCLEO-H5E5ZJ PCB: the usefulness of the M.2 Key A socket, the extensive possibilities offered by the other headers, and, in particular, the surprisingly large number of MCU GPIOs that are brought out to them and are available. I have a great deal of respect for the NUCLEO-H5E5ZJ PCB and for the STM32H5E5. The capabilities and functionality provided by this device are considerably beyond anything I have previously encountered in a microcontroller. I am posting these two PDF schematics and a third SPI1 skin here in the hope that other engineers may find them useful. They are the most recent versions as of the 9th of September 2026.
https://billsnotes.co.uk/NUCLEO-H5E5ZJ/5e5_main_v2.pdf
https://billsnotes.co.uk/NUCLEO-H5E5ZJ/5e5_stlink.pdf